ARCHITECTS & ENGINEERS SPECIFICATION - Q-Sys Core 250i
The System Processor shall be an Intel based centralized processor and control engine.  It shall be a single-chassis processor with no internal or external audio busses to other processors.   The system shall operate on a native gigabit Ethernet, employs DiffServ quality of service, IEEE 1588 time reference, UDP/IP data transport, and floating point format audio data representation. The overall system latency from analog input to synchronized analog outputs shall be 2.5 ms or less. For routed networks, the end to end system latency shall be 3.2 ms or less. 

The system shall have the capability of being completely redundant. The processor shall be able to support a second synchronized  backup processor with complete automatic failover in ten seconds or less.  Each processor and I/O peripheral shall have redundant network connections for seamless audio stream failover. 

The system processor shall have a minimum network channel capability of 64 channels and an end node capacity of at least 64 channels of audio.  I/O capacity shall be 8 card slots using one of six I/O circuit cards (HD-15 pin Amp Out, Line Out, High-performance Mic/Line In, Standard Mic/Line In, CobraNet In/Out, and AES/EBU In/Out). 

The system processor shall have the following front panel controls and indicators: LCD page forward momentary switch, Unit ID button momentary switch, Clear settings momentary switch, Power On blue LED, Device Status tri-color LED, 32 audio signal tri-color LEDs, and a 240 x 64 monochrome LCD graphics display displaying the device name, design name and status, type of I/O cards in the I/O slots, LAN A and B settings, and the firmware version. 

On the rear panel, the system processor shall have one RS232 DE-9 (male 9-pin D-shell) connector, VGA and DVI Video Out, GPIO A: DA-15 (female 15-pin D shell) connector, GPIO B: DA-15 (female 15-pin D shell) connector, Q-Sys Network: LAN A RJ45 1000 MBps only, LAN B: RJ45 1000 MBps only. The dimensions of the System processor shall be: 3.5" x 19" x 15" (89 mm x 482.6 mm x 381 mm). 

The system processor shall store a single design which can be comprised of components, wiring, links, text, and graphics on a single or multiple schematic pages.  Designs shall include any of the following DSP functions, test and measurement components, control components, and layout components: Acoustic Echo Cancellers, Audio Players, Audio Streaming components, Crossfaders, Crossovers, Delay components, Auto Gain control elements, Compressors, Gates, Duckers, Expanders, Ambient Noise Compensators, Limiters, Gain blocks, Graphic Equalizers, Parametric Equalizers, FIR Filters, All-Pass Filters, Band-Pass Filters, Band-Stop Filters, High-Pass Filters, Low-Pass Filters, FIR High-Pass filters, FIR Low-Pass Filters, Dual-Shelf Equalizers, Notch Filters, Meters, Matrix Mixers, Gain-Sharing Automatic Mixers, Gated Automatic Mixers, Signal Routers, Public Address Routers, Room Combiners, Signal Presence Meters, Tone Generators, Tone and Noise Generators, Dual Trace FFT Measurement Modules, Real Time Analyzers, Signal Injectors, and Signal Probes.
The system processor shall support custom user control interfaces either on proprietary touch screen controllers, or network computers utilizing a control application, or iOS devices on Wi-Fi.  Custom control interfaces shall be capable of having multiple user-selectable pages with different controls on each.

The system processor and control engine shall be the QSC Q-Sys Core 500i.