CXD8.4Q A&E Specs
The power amplifier shall be an eight-channel network-processing device that is designed to operate exclusively with a QSC Q-SYS system on a Gigabit Ethernet network. The amplifier shall be powered by a universal switch-mode power supply that supports operation at any AC voltage from 100 to 240 V at 50 or 60 Hz. The power supply shall have power factor correction (PFC) to make the current flow more nearly sinusoidal and analogous to the voltage waveform. The amplifier shall offer multi-stage sleep modes to automatically reduce AC power consumption during idle time. The amplifier shall be cooled by forced air, with the intake at the rear and exhaust at the front. The fan speed shall be thermally controlled and also shall be visible in units of revolutions per minute (RPM) on the amplifier’s front panel as well as on its network control panel.

The amplifier shall utilize a fixed-clock class D output circuit topology with eight individual channels, arranged in two banks of four (channels A–D and E–H) providing up to 4000 watts (maximum short term) total power and 2400 watts (continuous) total power. The clock signal of the output circuits shall be synchronous with the power supply clock to prevent noise due to heterodyning. The amplifier shall be configurable via Q-SYS, including arranging the output channels as single units as well as in various bridged and parallel combinations. 

The power amplifier’s eight inputs shall be balanced and shall accommodate mic or line levels. They shall offer individually switchable 12-volt phantom power and shall be routable within the Q-SYS environment. Each input’s impedance shall be 8 kilohms (balanced) and 4 kilohms (unbalanced). Its maximum RMS input level before clipping shall be 3.88 V (at the 1.2 V setting) or 12.3 V (at the 3.9 V setting). 

The power amplifier shall meet the following performance criteria: typical distortion (into 8 ohm loads) of 0.02% to 0.05%; maximum distortion (4 to 8 ohms) of no worse than 1%; a frequency response (into an 8 ohm load) of from 20 Hz to 20 kHz at ±0.25 dB; noise at -104 dB (A weighted, with output section muted); maximum gain of 38.4 dB (on 1.2 V setting); IHF damping factor of greater than 100.

Channel muting and gain shall be controllable via the amplifier’s front panel controls or the Q-SYS system. Changes made either way shall immediately reflect in the other as well. The amplifier shall indicate network status and monitoring, including faults. The front panel shall offer a summary of fault and error conditions. 

The amplifier shall have output load monitoring on each output. The load monitor shall have the range to detect and calculate impedance of conditions including short circuits, low impedance loudspeakers, and lightly loaded 70 V and 100 V lines with impedances as high as 1 kilohm. The load monitor shall report the calculated load impedance on each channel via the front panel and the Q-SYS network. The amplifier front panel shall feature LED metering of all eight inputs and eight outputs, a 400 × 240 TFT color display, navigation buttons, an LED power button/indicator, a fault indicator, a control knob, and cast aluminum handles.

The amplifier back panel shall feature dual RJ-45 jacks for connecting to the Q-LAN network, enabling integration into the Q-SYS system for bi-directional passage of digital audio, control signals, and status monitoring data. The rear panel shall provide eight balanced analog audio inputs (for mic or line signal levels) on 3-pin Phoenix connectors, and eight touch-proof Phoenix connectors for connecting loudspeaker cables to the channel outputs. The amplifier back panel shall also provide eight GPIO terminals that extend Q-SYS control to or from external devices.

The amplifier shall be 3.5 in (89 mm) high, 19 in (482 mm) wide, and 16 in (406 mm) deep. The amplifier shall have a net weight of 25 lb (11.3 kg).

The multi-channel system-processing amplifier shall be the QSC CXD8.4Q.